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dual processor supervisors with watchdog adm13305 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2007 analog devices, inc. all rights reserved. features dual supervisory circuits supply voltage range of 2.7 v to 5.5 v pretrimmed threshold options: 1.8 v, 2.5 v, 3.3 v, and 5 v adjustable 0.6 v voltage reference maximum supply current of 40 a 140 ms (minimum) reset timeout watchdog timer with 1.6 sec (typical) timeout reset valid from v dd 1.1 v push-pull reset and reset outputs 8-lead, narrow body soic package temperature range: ?40c to +85c applications supervising dsps/microcontrollers industrial and portable equipment wireless systems notebook/desktop computers general description the adm13305 is a dual voltage supervisor designed to monitor two supplies and provide a reset signal to dsp and microprocessor-based systems. there are five models available, all of which feature a combination of internally pretrimmed undervoltage threshold options for monitoring 1.8 v, 2.5 v, 3.3 v, and 5 v supplies. there is also an adjustable input option with an undervoltage threshold voltage of 0.6 v. the adm13305-18, adm13305-25, and adm13305-33 models have two internally fixed thresholds. the adm13305-4 and adm13305-5 offer one internally fixed threshold and one externally programmable threshold via a resistor string. see the ordering guide for a list of all available options. during power-up, reset is asserted when the supply voltage exceeds 1.1 v. the device then monitors the sensev input pins and holds the reset output low as long as either of the sensev inputs remains below the rising threshold voltage, v it+ . functional block diagrams 06922-002 v dd 14k? r1 r2 r3 r4 1.25v reset logic + timer oscillator transition detection watchdog logic + timer reset adm13305-33 adm13305-25 adm13305-18 sense1 sense2 gnd wdi mr reset figure 1. 06922-001 v dd 14k? r1 r2 0.6v reset logic + timer oscillator transition detection watchdog logic + timer reset adm13305-4 adm13305-5 sense1 sense2 wdi mr reset gnd figure 2. . once the supplies monitored at the sensev inputs rise above their associated thresholds, the reset signal remains low for the reset timeout period before deasserting. subsequently, if a voltage monitored by the sensev pins falls below its associ- ated falling threshold, v it? , the reset output asserts. the adm13305 features both an active high reset and an active low reset output. as well as providing power-on reset signals, an on-chip watchdog timer can reset the microprocessor if it fails to strobe within the preset timeout period. a reset signal can also be asserted by an external push button through the manual reset input pin. the adm13305 is available in an 8-lead, narrow body soic package. the device operates over the extended industrial temperature range of ?40c to +85c.
adm13305 rev. 0 | page 2 of 12 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? general description ......................................................................... 1 ? functional block diagrams ............................................................. 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? timing requirements .................................................................. 5 ? switching characteristics ............................................................ 5 ? functional truth table ................................................................ 5 ? absolute maximum ratings ............................................................ 6 ? thermal resistance ...................................................................... 6 ? esd caution...................................................................................6 ? pin configuration and function descriptions ..............................7 ? typical performance characteristics ..............................................8 ? theory of operation ...................................................................... 10 ? input configuration ................................................................... 10 ? reset output ............................................................................... 10 ? watchdog timer ......................................................................... 10 ? manual reset ( mr ) .................................................................... 11 ? outline dimensions ....................................................................... 12 ? ordering guide .......................................................................... 12 ? revision history 8/07revision 0: initial version
adm13305 rev. 0 | page 3 of 12 specifications v dd = 2.7 v to 5.5 v, ?40c t a +85c, unless otherwise noted. table 1. adm13305-18, adm13305-25, and adm13305-33 parameter min typ max unit test conditions/comments operating voltage range, v dd 2.7 5.5 v supply current, i dd 40 a input capacitance, c i 10 pf v i = 0 v to v dd reset, reset output high level output voltage, v oh v dd ? 0.2 v i oh = ?20 a v dd ? 0.4 v i oh = ?2 ma, v dd = 3.3 v v dd ? 0.4 v i oh = ?3 ma, v dd = 5.5 v low level output voltage, v ol 0.2 v i ol = 20 a 0.4 v i ol = 2 ma, v dd = 3.3 v 0.4 v i ol = 3 ma, v dd = 5.5 v power-up reset voltage 1 0.4 v i ol = 20 a, v dd 1.1 v sense inputs falling threshold voltage, v it? 1.64 1.68 1.72 v t a = 0c to 85c 2.20 2.25 2.30 v t a = 0c to 85c 2.86 2.93 3.00 v t a = 0c to 85c 4.46 4.55 4.64 v t a = 0c to 85c 1.64 1.68 1.73 v t a = ?40c to +85c 2.20 2.25 2.32 v t a = ?40c to +85c 2.86 2.93 3.02 v t a = ?40c to +85c 4.46 4.55 4.67 v t a = ?40c to +85c hysteresis at sensev inputs, v hys 15 mv v it? = 1.68 v 20 mv v it? = 2.25 v 30 mv v it? = 2.93 v 40 mv v it? = 4.55 v wdi average high level input current, i h(av) 100 150 a wdi = v dd = 5.5 v average low level input current, i l(av) ?15 ?20 a wdi = 0 v, v dd = 5.5 v input voltage at mr and wdi high level, v ih 0.7 v dd v low level, v il 0.3 v dd v input transition rise and fall rate at mr 50 ns/v high level input current, i h wdi 120 170 a wdi = v dd = 5.5 v mr ?130 ?180 a mr = 0.7 v dd , v dd = 5.5 v sense1 5 8 a sense1 = v dd = 5.5 v sense2 6 9 a sense2 = v dd = 5.5 v low level input current, i l wdi ?120 ?170 a wdi = 0 v, v dd = 5.5 v mr ?430 ?600 a mr = 0 v, v dd = 5.5 v sensev ?1 +1 a sense1, sense2 = 0 v 1 the lowest supply voltage at which reset becomes active. t r , v dd 15 s/v.
adm13305 rev. 0 | page 4 of 12 v dd = 2.7 v to 5.5 v, ?40c t a +85c, unless otherwise noted. table 2. adm13305-4 and adm13305-5 parameter min typ max unit test conditions/comments operating voltage range, v dd 2.7 5.5 v supply current, i dd 40 a input capacitance, c i 10 pf v i = 0 v to v dd reset, reset output high-level output voltage, v oh v dd ? 0.2 v i oh = ?20 a v dd ? 0.4 v i oh = ?2 ma, v dd = 3.3 v v dd ? 0.4 v i oh = ?3 ma, v dd = 5.5 v low-level output voltage, v ol 0.2 v i oh = 20 a 0.4 v i oh = 2 ma, v dd = 3.3 v 0.4 v i oh = 3 ma, v dd = 5.5 v power-up reset voltage 1 0.4 v i oh = 20 a, v dd 1.1 v sensev inputs falling input threshold voltage, v it? 0.5952 0.6 0.6048 v t a = ?40c to +85c 2.23 2.25 2.29 v t a = ?40c to +85c 2.90 2.93 2.98 v t a = ?40c to +85c hysteresis at sensev inputs, v hys 0 mv v it? = 0.6 v 20 mv v it? = 2.25 v 30 mv v it? = 2.93 v wdi average high level input current, i h(av) 100 150 a wdi = v dd = 5.5 v average low level input current, i l(av) ?15 ?20 a wdi = 0 v, v dd = 5.5 v input voltage at mr and wdi high level, v ih 0.7 v dd v low level, v il 0.3 v dd v input transition rise and fall rate at mr 50 ns/v high level input current, i h wdi 120 170 a wdi = v dd = 5.5 v mr ?130 ?180 a mr = 0.7 v dd , v dd = 5.5 v sense1 5 8 a sense1 = v dd = 5.5 v sense2 ?50 +50 na sense2 = v dd = 5.5 v low level input current, i l wdi ?120 ?170 a wdi = 0 v, v dd = 5.5 v mr ?430 ?600 a mr = 0 v, v dd = 5.5 v sensev ?1 +1 a sense1, sense2 = 0 v 1 the lowest supply voltage at which reset becomes active. t r , v dd 15 s/v.
adm13305 rev. 0 | page 5 of 12 timing requirements v dd = 2.7 v to 5.5 v, r l = 1 m, c l = 50 pf, t a = 25c. table 3. adm13305-18, adm13305-25 and adm13305-33 parameter min typ max unit test conditions/comments pulse width (t w ) sensev 6 s v sensevl = v it? ? 0.3 v, v sensevh = v it+ + 0.3 v mr 100 ns v ih = 0.7 v dd , v il = 0.3 v dd wdi 100 ns v ih = 0.7 v dd , v il = 0.3 v dd table 4. adm13305-4 and adm13305-5 parameter min typ max unit test conditions/comments pulse width (t w ) sensev 30 s v sensevl = v it? ? 0.3 v, v sensevh = v it+ + 0.3 v mr 100 ns v ih = 0.7 v dd , v il = 0.3 v dd wdi 100 ns v ih = 0.7 v dd , v il = 0.3 v dd switching characteristics v dd = 2.7 v to 5.5 v, r l = 1 m, c l = 50 pf, t a = 25c. table 5. adm13305-18, adm13305-25 and adm13305-33 parameter min typ max unit test conditions/comments watchdog timeout (t t(out) ) 1.1 1.6 2.3 sec v i(sensev) v it+ + 0.2 v, mr 0.7 v dd delay time (t d ) 140 200 280 ms v i(sensev) v it+ + 0.2 v, mr 0.7 v dd propagation delay, high-to-low, mr to reset 1 / reset (t phl ) 200 500 ns v i(sensev) v it+ + 0.2 v, v ih 0.7 v dd , v il 0.3 v dd propagation delay, low-to-high, mr to reset/ reset 1 (t plh ) 200 500 ns v i(sensev) v it+ + 0.2 v, v ih 0.7 v dd , v il 0.3 v dd propagation delay, high-to-low, sensev to reset 1 / reset (t phl ) 1 5 s v ih = v it+ + 0.3 v, v il = v it? ? 0.3 v, mr 0.7 v dd propagation delay, low-to-high, sensev to reset/ reset 1 (t plh ) 1 5 s v ih = v it+ + 0.3 v, v il = v it? ? 0.3 v, mr 0.7 v dd 1 the reset timeout delay of 200 ms masks the propagation delay. table 6. adm13305-4 and adm13305-5 parameter min typ max unit test conditions/comments watchdog timeout (t t(out) ) 1.1 1.6 2.3 sec v i(sensev) v it+ + 0.2 v, mr 0.7 v dd delay time (t d ) 140 200 280 ms v i(sensev) v it+ + 0.2 v, mr 0.7 v dd propagation delay, high-to-low, mr to reset 1 / reset (t phl ) 200 500 ns v i(sensev) v it+ + 0.2 v, v ih 0.7 v dd , v il 0.3 v dd propagation delay, low-to-high, mr to reset/ reset 1 (t plh ) 200 500 ns v i(sensev) v it+ + 0.2 v, v ih 0.7 v dd , v il 0.3 v dd propagation delay, high-to-low, sensev to reset 1 / reset (t phl ) 30 s v ih = v it+ + 0.3 v, v il = v it? ? 0.3 v, mr 0.7 v dd propagation delay, low-to-high, sensev to reset/ reset 1 (t plh ) 30 s v ih = v it+ + 0.3 v, v il = v it? ? 0.3 v, mr 0.7 v dd 1 the reset timeout delay of 200 ms masks the propagation delay. functional truth table table 7. mr sense1 > v it1 sense2 > v it2 reset reset l x 1 x 1 l h h 0 0 l h h 0 1 l h h 1 0 l h h 1 1 h l 1 x = dont care.
adm13305 rev. 0 | page 6 of 12 absolute maximum ratings table 8. parameter rating supply voltage range, v dd ?0.3 v to +6 v mr , wdi ?0.3 v to v dd + 0.3 v sense1, sense2 (v dd + 0.3 v)v it /v ref reset, reset stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. ?0.3 v to +6 v maximum low output current 5 ma maximum high output current ?5 ma input clamp current (v i < 0 v, v i > v dd ) 20 ma output clamp current (v o < 0 v, v o > v dd ) 20 ma operating temperature range ?40c to +85c storage temperature range ?65c to +150c lead temperature soldering (10 sec) 300c vapor phase (60 sec) 215c infrared (15 sec) 220c thermal resistance table 9. package type ja unit 8-lead soic_n (r-8) 206 c/w esd caution
adm13305 rev. 0 | page 7 of 12 pin configuration and fu nction descriptions 06922-003 sense1 1 sense2 2 wdi 3 gnd 4 v dd 8 mr 7 reset 6 reset 5 adm13305 top view (not to scale) figure 3. pin configuration table 10. pin function descriptions pin no. mnemonic description 1 sense1 sense input voltage 1. 2 sense2 sense input voltage 2. 3 wdi watchdog timer input. 4 gnd ground. 5 reset active-low reset output. 6 reset active-high reset output. 7 mr manual reset input. 8 v dd supply voltage.
adm13305 rev. 0 | page 8 of 12 typical performance characteristics 0.6003 0.5985 06922-004 free air temperature, t a (c) input threshold voltage, v it (v) 0.6001 0.5999 0.5997 0.5995 0.5993 0.5991 0.5989 0.5987 ?40 ?20 0 20 40 60 80 t a = 25c v dd = 2v mr = open 06922-007 0 0 1000 minimum pulse duration at sense, t w (s) 10 9 8 7 6 5 4 3 2 1 100 200 300 400 500 600 700 800 900 v dd = 5.5v mr = open sense threshold overdrive (mv) figure 4. sense threshold voltage vs. free air temperature at v dd figure 7. adm13305-18, adm13305 -25 and adm13305-33 minimum pulse duration at sense vs. sense threshold overdrive 40 ?10 ?1.0 6.5 06922-005 supply voltage, v dd (v) supply current, i dd (a) 35 30 25 20 15 10 5 0 ?5 ?0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 sensev = 5.5v mr = open t a = 25c 30 0 1000 06922-017 minimum pulse duration at sense, t w (s) 40 39 38 37 36 35 34 33 32 31 100 200 300 400 500 600 700 800 900 v dd = 5.5v mr = open sense threshold overdrive (mv) figure 5. supply current vs. supply voltage figure 8. adm13305-4 and adm13305-5 minimum pulse duration at sense vs. sense threshold overdrive 0 0? ?5 ?4 ?3 ?2 ?1 06922-008 high level output current, i oh (ma) high level output voltage, v oh (v) 2.50 6 2.00 1.00 0.50 1.50 ?40c 0c +25c +85c v dd = 2v mr = open ?900 ?1.0 7.0 06922-006 input voltage at mr, v i (v) input current, i i (a) 100 200 0 ?100 ?200 ?300 ?400 ?500 ?600 ?700 ?800 ?0.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 v dd = 5.5v t a = 25c figure 6. input current vs. input voltage at mr figure 9. high level output volt age vs. high level output current
adm13305 rev. 0 | page 9 of 12 06922-009 0 0? ?50 ?40 ?30 ?20 ?10 high level output current, i oh (ma) high level output voltage, v oh (v) 6.0 6 0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 ?40c 0c +25c +85c v dd = 5.5v mr = open figure 10. high level output voltage vs. high level output current 0 06 06922-010 low level output current, i ol (ma) low level output voltage, v ol (v) 0.25 0.20 0.15 0.10 0.05 24 135 v dd = 2v mr = open ?40c 0c +25c +85c figure 11. low level output voltage vs. low level output current 0 06 06922-016 low level output current, i ol (ma) low level output voltage, v ol (v) 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 5 10152025303540455055 ?40c 0c +25c +85c v dd = 5.5v mr = open figure 12. low level output voltage vs. low level output current
adm13305 rev. 0 | page 10 of 12 theory of operation the adm13305 is a dual voltage supervisor designed to monitor two supplies and provide a reset signal to dsp and microprocessor-based systems. there are five models available, all of which feature a combina- tion of internally pretrimmed undervoltage threshold options for monitoring 1.8 v, 2.5 v, 3.3 v, and 5 v supplies. there is also an adjustable input option with an undervoltage threshold of 0.6 v. the adm13305-18, adm13305-25, and adm13305-33 have two internally fixed thresholds, while the adm13305-4 and adm13305-5 offer one internally fixed threshold and one externally programmable threshold via a resistor string. see the ordering guide for a list of all available options. input configuration the adm13305 is powered through v dd . to increase noise immunity in noisy applications, place a 0.1 f capacitor between the v dd input and ground. the sensev inputs are resistant to short power supply glitches. do not allow an unused sensev input to float or to be grounded, instead connect it to a supply voltage greater than its specified threshold voltage. typically, the threshold voltage at each adjustable sensev input is 0.6 v. to monitor a voltage greater than 0.6 v, connect a resistor divider network to the device as depicted in figure 13 , where, ? ? ? ? ? ? + = r2 r2r1 v monitered v6. 0 06922-012 r1 r2 monitored voltage v ref = 0.6v figure 13. setting the adjustable monitor reset output the reset outputs are guaranteed to be in the correct state for v dd down to 1.1 v. during power-up, reset is asserted when the supply voltage becomes greater than 1.1 v. 06922-013 sensev v (nom) 0 1 v it? reset t d t d t t figure 14. reset timing diagram once the supplies monitored at the sensev pins rise above their associated threshold level, the reset signal remains low for the reset timeout period before deasserting. subsequently, if either of the supplies monitored by the sensev pins falls below its associated threshold the reset output reasserts. the adm13305 features both an active-low, push-pull reset output and an active-high, push-pull reset output. watchdog timer the adm13305 features a watchdog timer that monitors microprocessor activity. a timer circuit is cleared with every low-to-high or high-to-low logic transition on the watchdog input pin (wdi). if the timer counts through the preset watchdog timeout period of 1.6 sec, reset is asserted, as shown in . figure 15 the microprocessor is required to toggle the wdi pin to avoid being reset. therefore, failure of the microprocessor to toggle wdi within the timeout period indicates a code execution error and the reset pulse generated restarts the microprocessor in a known state. the watchdog timer can be disabled by leaving wdi floating. 06922-014 0 1 reset 0 1 wdi t wd t d t t figure 15. watchdog timing diagram
adm13305 rev. 0 | page 11 of 12 manual reset ( mr ) the adm13305 features a manual reset input, which when driven low, asserts the reset output, as shown in figure 16 . when mr transitions from low to high, reset remains asserted for the duration of the reset active timeout period before deasserting. an external push-button switch can be connected between mr and ground to allow the user to generate a reset. 06922-015 0 1 reset t d t 0 1 t mr figure 16. manual reset timing diagram
adm13305 rev. 0 | page 12 of 12 (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. 012407 outline dimensions controlling dimensions are in millimeters; inch dimensions compliant to jedec standards ms-012-a a -a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2441) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 figure 17. 8-lead standard small outline package [soic_n] narrow body (r-8) dimensions shown in millimeters and (inches) ordering guide model nominal supervised voltage threshold voltage (typical) temperature range package description package option sense1 sense2 sense1 sense2 adm13305-18arz 1 3.3 v 1.8 v 2.93 v 1.68 v C40c to +85c 8-lead soic_n r-8 adm13305-18arz-rl7 1 3.3 v 1.8 v 2.93 v 1.68 v C40c to +85c 8-lead soic_n r-8 adm13305-25arz 1 3.3 v 2.5 v 2.93 v 2.25 v C40c to +85c 8-lead soic_n r-8 adm13305-25arz-rl7 1 3.3 v 2.5 v 2.93 v 2.25 v C40c to +85c 8-lead soic_n r-8 adm13305-33arz 1 5 v 3.3 v 4.55 v 2.93 v C40c to +85c 8-lead soic_n r-8 adm13305-33arz-rl7 1 5 v 3.3 v 4.55 v 2.93 v C40c to +85c 8-lead soic_n r-8 adm13305-4arz 1 3.3 v adjustable 2 2.93 v 0.6 v C40c to +85c 8-lead soic_n r-8 adm13305-4arz-rl7 1 3.3 v adjustable 2 2.93 v 0.6 v C40c to +85c 8-lead soic_n r-8 adm13305-5arz 1 2.5 v adjustable 2 2.25 v 0.6 v C40c to +85c 8-lead soic_n r-8 adm13305-5arz-rl7 1 2.5 v adjustable 2 2.25 v 0.6 v C40c to +85c 8-lead soic_n r-8 1 z = rohs compliant part. 2 0.6 v adjustable. external resistor divider determines the actual sense voltage. ?2007 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d06922-0-8/07(0)

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